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Nordic Semiconductor /nrf52 /NFCT /INTENCLR

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Interpret as INTENCLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disabled)READY 0 (Disabled)FIELDDETECTED 0 (Disabled)FIELDLOST 0 (Disabled)TXFRAMESTART 0 (Disabled)TXFRAMEEND 0 (Disabled)RXFRAMESTART 0 (Disabled)RXFRAMEEND 0 (Disabled)ERROR 0 (Disabled)RXERROR 0 (Disabled)ENDRX 0 (Disabled)ENDTX 0 (Disabled)AUTOCOLRESSTARTED 0 (Disabled)COLLISION 0 (Disabled)SELECTED 0 (Disabled)STARTED

AUTOCOLRESSTARTED=Disabled, TXFRAMEEND=Disabled, COLLISION=Disabled, ERROR=Disabled, SELECTED=Disabled, RXERROR=Disabled, READY=Disabled, ENDTX=Disabled, FIELDLOST=Disabled, STARTED=Disabled, RXFRAMESTART=Disabled, RXFRAMEEND=Disabled, ENDRX=Disabled, TXFRAMESTART=Disabled, FIELDDETECTED=Disabled

Description

Disable interrupt

Fields

READY

Write ‘1’ to Disable interrupt for READY event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
FIELDDETECTED

Write ‘1’ to Disable interrupt for FIELDDETECTED event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
FIELDLOST

Write ‘1’ to Disable interrupt for FIELDLOST event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
TXFRAMESTART

Write ‘1’ to Disable interrupt for TXFRAMESTART event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
TXFRAMEEND

Write ‘1’ to Disable interrupt for TXFRAMEEND event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
RXFRAMESTART

Write ‘1’ to Disable interrupt for RXFRAMESTART event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
RXFRAMEEND

Write ‘1’ to Disable interrupt for RXFRAMEEND event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
ERROR

Write ‘1’ to Disable interrupt for ERROR event

0 (Disabled): Read: Disabled

1 (Enabled): Read: Enabled

1 (Clear): Disable
RXERROR

Write ‘1’ to Disable interrupt for RXERROR event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
ENDRX

Write ‘1’ to Disable interrupt for ENDRX event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
ENDTX

Write ‘1’ to Disable interrupt for ENDTX event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
AUTOCOLRESSTARTED

Write ‘1’ to Disable interrupt for AUTOCOLRESSTARTED event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
COLLISION

Write ‘1’ to Disable interrupt for COLLISION event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
SELECTED

Write ‘1’ to Disable interrupt for SELECTED event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
STARTED

Write ‘1’ to Disable interrupt for STARTED event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled

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Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.

  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

  3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data